FöRFATTARE
Berglund, Carl

INSTITUTION
Systemteknik / Signalbehandling

SAMMANFATTNING
In the new Information Technology (IT) society demands on having fast transmission speeds are growing. Previous generations of wireless mobile networks are only made for phone calls and slow data rate services. With the 3rd generation (3G) technologies the transmission speeds are pushed up to follow today's needs. One of these technologies is Universal Mobile Telecommunications System (UMTS) which had its first specification released in 2000 by the Third Generation Partnership Project (3GPP) collaboration group.

To verify the baseband processing of an UMTS base station a test environment is used. Today the test environment is generating sampled antenna data in an offline fashion. The data will include information that is not used all the time and this creates unnecessary interference in the system. Due to limited amount of memory the data has to be repeated and this gives a poor statistical confidence. To generate long and unique test cases and decrease the interference a real-time system is required.

The purpose of this master's thesis is to systemize a real-time encoder for the uplink and implement the baseband encoding for this encoder. The implementation is to be done on existing hardware. It should handle signaling and conversational speech services provided by the UMTS standard and it will be investigated how to divide the functionality between a Digital Signal Processor (DSP) and an Field-Programmable Gate Array (FPGA).

A big part of this master's thesis has been to study the 3GPP standard uplink physical layer, Wideband Code Division Multiple Access (WCDMA) and to gain understanding of how the UMTS mobile network is built up. Before implementation on hardware, simulations in MATLAB were done to gain knowledge of the coding algorithms and to see that the functionality of the system worked correctly.

The baseband encoder was implemented so that all encoding steps up to scrambling are done by a DSP and the scrambling is done by an FPGA. The encoder has support for Dedicated Channel (DCH) users and can encode radio frames within given time margins.

ISSN 1402-1617 / ISRN LTU-EX--08/218--SE / NR 2008:218